Improved ML-DSA Hardware Implementation With First Order Masking Countermeasure

Kamal Raj; Prasanna Ravi; Tee Kiah Chia; Anupam Chattopadhyay

Paper 2024/1817

Improved ML-DSA Hardware Implementation With First Order Masking Countermeasure

Kamal Raj

, Nanyang Technological University

Prasanna Ravi

, Nanyang Technological University

Tee Kiah Chia, Nanyang Technological University

Anupam Chattopadhyay, Nanyang Technological University

Abstract

We present the protected hardware implementation of the Module-Lattice-Based Digital Signature Standard (ML-DSA). ML-DSA is an extension of Dilithium 3.1, which is the winner of the Post Quantum Cryptography (PQC) competition in the digital signature category. The proposed design is based on the existing high-performance Dilithium 3.1 design. We implemented existing Dilithium masking gadgets in hardware, which were only implemented in software. The masking gadgets are integrated with the unprotected ML-DSA design and functional verification of the complete design is verified with the Known Answer Tests(KATs) generated from ML-DSA reference software. We also present the practical power side-channel attack experimental results by implementing masking gadgets on the standard side-channel evaluation FPGA board and collecting power traces up-to 1 million traces. The proposed protected design has the overhead of 1.127× LUT, 1.2× Flip-Flop, and 378× execution time compared to unprotected design. The experimental results show that it resists side-channel attacks.

Metadata

Available format(s): PDF
Category: Implementation
Publication info: Preprint.
Keywords: Post Quantum Cryptography ML-DSA Hardware Implementation Masking Side-Channel Attack Security
Contact author(s): kamal raj @ ntu edu sg
prasanna ravi @ ntu edu sg
tkchia @ ntu edu sg
anupam @ ntu edu sg
History: 2024-11-12: revised; 2024-11-06: received; See all versions
Short URL: https://ia.cr/2024/1817
License: CC BY-NC

BibTeX

@misc{cryptoeprint:2024/1817,
      author = {Kamal Raj and Prasanna Ravi and Tee Kiah Chia and Anupam Chattopadhyay},
      title = {Improved {ML}-{DSA} Hardware Implementation With First Order Masking Countermeasure},
      howpublished = {Cryptology {ePrint} Archive, Paper 2024/1817},
      year = {2024},
      url = {https://eprint.iacr.org/2024/1817}
}